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  5000-pixel 3 line ccd linear sensor (color) description the ILX115LA is a reduction type ccd linear sensor developed for color dppc. this sensor reads a3-size documents at a density of 400 dpi (dot per inch). features number of effective pixels: 15000 pixels (5000 pixels 3) pixel size: 14m 14m (14m pitch) distance between line: 84m (6 lines) maximum data rate: 30mhz/color (20mhz/color during clamp circuit usage) single 9v power supply input clock pulse: cmos 5v drive number of output: 6 (2/color) package: 44pin sdip (400mil) absolute maximum ratings supply voltage v dd 11 v operating temperature ?0 to +60 ? storage temperature ?0 to +80 ? pin configuration (top view) block diagram ?1 e99705-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. ILX115LA 44 pin sdip (cer-dip) 1 44 v out-even (b) 2 v out-odd (r) 3 v out-even (r) 4 v dd 5 nc 6 f rs 7 nc 8 f clp 9 nc 10 f 2 11 43 42 41 40 39 38 37 36 35 34 nc gnd v out-odd (b) v out-even (g) v out-odd (g) nc v ref nc f 2l nc nc f 1 12 33 nc 13 nc 14 nc 15 sw clp 16 f 2 17 nc 18 f rog (r) 19 nc 20 nc 21 gnd 22 32 31 30 29 28 27 26 25 24 23 nc nc nc nc nc f 1 f rog (g) nc v dd f rog (b) nc nc 5000 5000 r 1 1 1 g b 5000    f 1 f r o g ( g ) f 1 f 2 l v r e f v o u t - o d d ( g ) v o u t - e v e n ( g ) f 2 f 2 f r s v o u t - o d d ( r ) v o u t - e v e n ( r ) v d d s w c l p f c l p v d d o u t p u t c i r c u i t - o d d ( g ) o u t p u t c i r c u i t - e v e n ( g ) o u t p u t c i r c u i t - o d d ( b ) o u t p u t c i r c u i t - e v e n ( b ) o u t p u t c i r c u i t - o d d ( r ) o u t p u t c i r c u i t - e v e n ( r )    c c d r e g i s t e r ( g ) c c d r e g i s t e r ( g ) s e n s o r ( g ) r o g ( g ) r o g ( g )    f r o g ( b ) g n d       v o u t - e v e n ( b ) f r o g ( r )    g n d v o u t - o d d ( b ) c c d r e g i s t e r ( b ) c c d r e g i s t e r ( b ) s e n s o r ( b ) r o g ( b ) r o g ( b ) c c d r e g i s t e r ( r ) c c d r e g i s t e r ( r ) s e n s o r ( r ) r o g ( r ) r o g ( r ) 2 9 3 4 3 7 3 9 4 1 4 2 1 6 1 0 4 6 1 5 8 3 2 2 8 2 6 2 5 2 1 1 8 1 4 4 4 3
? 2 ILX115LA pin description recommended supply voltage item v dd min. 8.55 typ. 9 max. 9.45 unit v clock characteristics symbol c f 1 , c f 2 c f 2l c f rs c f rog c f clp min. typ. 1800 60 60 60 60 max. unit pf pf pf pf pf item input capacity of f 1, f 2 input capacity of f 2l input capacity of f rs input capacity of f rog input capacity of f clp note) input capacity of f 1, f 2 is a value gathering respective related pins. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 v out-even (b) v out-odd (r) v out-even (r) v dd nc f rs nc f clp nc f 2 nc nc nc nc sw clp f 2 nc f rog (r) nc nc gnd nc signal output (b) signal output (r) signal output (r) 9v power supply nc clock pulse input nc clock pulse input nc clock pulse input nc nc nc nc clamp switch clock pulse input nc clock pulse input nc nc gnd nc 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 nc nc f rog (b) v dd nc f rog (g) f 1 nc nc nc nc f 1 nc nc f 2l nc v ref nc v out-odd (g) v out-even (g) v out-odd (b) gnd nc nc clock pulse input 9v power supply nc clock pulse input clock pulse input nc nc nc nc clock pulse input nc nc clock pulse input nc power supply (clamp) nc signal output (g) signal output (g) signal output (b) gnd pin no. symbol description pin no. symbol description
? 3 ILX115LA input clock pulse voltage high level low level min. 4.75 ?.3 typ. 5.0 0 max. 5.25 0.1 unit v v item f 1, f 2, f 2l, f rs, f rog, f clp pulse voltage clock frequency min. typ. 1 1 max. 15 10 unit mhz mhz item symbol f 1, f 2, f 2l, f rs f clp f f 1 , f f 2 , f f 2l , f f rs f f clp mode description clamp circuit not used clamp circuit used 8pin f clp v dd f clp 15pin sw clp gnd v dd pin condition
? 4 ILX115LA electrooptical characteristics (note 1) ta = 25 c, v dd = 9v, f f rs = 1mhz, input clock = 5 vp-p, clamp circuit used, light source = 3200k, ir cut filter: cm-500s (t = 1.0mm) item symbol min. typ. max. unit remarks sensitivity sensitivity nonuniformity saturation output voltage saturation exposure dark voltage average dark signal nonuniformity image lag supply current total transfer efficiency output impedance offset level r r r g r b prnu v sat se r se g se b v drk dsnu il i vdd tte z o v os 5.10 5.17 5.48 1.5 0.18 0.18 0.16 92 6.80 6.89 7.30 5 1.8 0.26 0.26 0.25 1.5 1.5 0.02 45 98 185 4.4 8.50 8.61 9.13 15 3 5 60 v/(lx ?s) % v lx ?s mv mv % ma % v note 2 note 3 note 4 note 5 note 6 note 7 red green blue red green blue notes 1) in accordance with the given electrooptical characteristics, the even black level is defined as the average value of d24, d26 to d72. the odd black level is defined as average value of d23, d25 to d71. 2) for the sensitivity test light is applied with a uniform intensity of illumination. 3) prnu is defined as indicated below. ray incidence conditions are the same as for note 2. v out = 500mv prnu = 100 [%] where the 5000 pixels are divided into blocks of 100, even and odd pixels, respectively the maximum output of each block is set to v max , the minimum output to v min and the average output to v ave . 4) saturation exposure is defined as follows. se = v sat /r [lx ?s] 5) optical signal accumulated time t int stands at 10ms. 6) v out (b)= 500mv (typ.) 7) vos is defined as indicated below. v out indicates v out-odd (r), v out-even (r), v out-odd (g), v out-even (g), v out-odd (b), v out-even (b). (v max ?v min ) /2 v ave         v o s v o u t g n d
? 5 ILX115LA clock timing chart 1 * 1                                                             d 1 d 3 d 5 d 2 1 d 2 3 d 2 5 d 6 1 d 6 3 d 6 5 s 1 s 3 s 4 9 9 5 s 4 9 9 7 s 4 9 9 9 d 6 7 d 6 9 d 7 1 d 7 3 d 7 5 d 7 7 d 7 9 d 8 1 d 8 3 d 8 5 d 8 7 d 8 9 d 2 d 4 d 6 d 2 2 d 2 4 d 2 6 d 6 2 d 6 4 d 6 6 s 2 s 4 s 4 9 9 6 s 4 9 9 8 s 5 0 0 0 d 6 8 d 7 0 d 7 2 d 7 4 d 7 6 d 7 8 d 8 0 d 8 2 d 8 4 d 8 6 d 8 8 d 9 0 2 1 3 5 0 5 0 f c l p v o u t - o d d ( r ) v o u t - o d d ( g ) v o u t - o d d ( b ) v o u t - e v e n ( r ) v o u t - e v e n ( g ) v o u t - e v e n ( b ) f 2 f 2 l f r s f 1 f r o g 5 0 5 0 5 0 2 5 4 5 o p t i c a l b l a c k ( 4 2 p i x e l s ) d u m m y s i g n a l ( 6 6 p i x e l s ) d u m m y s i g n a l ( 2 4 p i x e l s ) e f f e c t i v e p i x e l s ( 5 0 0 0 p i x e l s ) 1 - l i n e o u t p u t p e r i o d ( 5 0 9 0 p i x e l s ) * 1 t h e t r a n s f e r p u l s e s ( f 1 , f 2 , f 3 ) m u s t h a v e m o r e t h a n 2 5 4 5 c y c l e s .
? 6 ILX115LA clock timing chart 2 clock timing chart 3 f r o g f 1 f 2 f 2 l t 1 t 2 t 4 t 5 t 3 t 7 t 6 f 1 f 2 f 2 l v o u t t 6 t 7 f r s f c l p t 8 t 9 t 1 0 t 1 5 t 1 2 t 1 4 t 1 1 t 1 3 t 1 7 t 1 6 t 1 8                    
? 7 ILX115LA clock pulse recommended timing symbol t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 t13 t14 t15 t16 t17 t18 min. 50 600 400 0 0 0 0 0 0 8 0 0 0 16 0 typ. 100 1000 1000 10 10 5 5 5 5 200 * 1 50 * 1 5 5 200 * 1 70 * 1 12 4 12 max. 100 100 10 10 10 10 10 10 unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns item f rog, f 1 pulse timing f rog pulse high level period f rog, f 1 pulse timing f rog pulse rise time f rog pulse fall time f 1 pulse fall time / f 2 pulse rise time f 1 pulse rise time / f 2 pulse fall time f rs pulse rise time f rs pulse fall time f rs pulse low level period f rs, f clp pulse timing 1 f clp pulse rise time f clp pulse fall time f rs, f clp pulse timing 2 f clp f 2l pulse timing signal output delay time for f rs signal output delay time for f clp signal output delay time for f 2l * 1 these timing is the recommended condition under f f rs = f f clp = 1mhz. clock timing chart 4 c r o s s p o i n t f 1 a n d f 2 f 1 5 v f 2 0 v 1 . 5 v ( m i n . ) 2 . 0 v ( m i n . ) c r o s s p o i n t f 1 a n d f 2 l f 1 5 v f 2 l 0 v 0 . 5 v ( m i n . ) 2 . 0 v ( m i n . )
? 8 ILX115LA application circuit * 1 application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same . v o u t - e v e n ( b ) v o u t - o d d ( r ) v o u t - e v e n ( r ) v d d n c f r s n c f c l p n c f 2 n c n c n c n c s w c l p f 2 n c f r o g ( r ) n c n c g n d n c g n d v o u t - o d d ( b ) v o u t - e v e n ( g ) v o u t - o d d ( g ) n c v r e f n c f 2 l n c n c f 1 n c n c n c n c f 1 f r o g ( g ) n c v d d f r o g ( b ) n c n c f r o g ( b ) f 2 f r o g ( r ) f 2 f c l p f r s f r o g ( g ) f 1 f 1 f 2 l v o u t - o d d ( b ) b u f f e r 1 b u f f e r 1 b u f f e r 1 v o u t - e n e n ( g ) v o u t - o d d ( g ) b u f f e r 1 b u f f e r 1 b u f f e r 1 v o u t - e n e n ( b ) * 1 d a t a r a t e f f r s = 1 m h z . 9 v 0 . 1 f 4 7 f 1 6 v v o u t - e n e n ( r ) v o u t - o d d ( r ) 3 . 3 f 1 0 0 w 2 w 1 0 0 w 1 0 0 w 2 w 1 0 0 w i c 1 : 7 4 a c 0 4 2 w 2 w 1 0 0 w 1 0 0 w i c 1 i c 1 b u f f e r 1 : i n 9 v 1 0 0 w 5 . 1 k w o u t 2 s c 2 7 8 5 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 4 4 4 3 4 2 4 1 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 3 3 2 3 1 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3
? 9 ILX115LA example of representative characteristics (v dd = 9v, ta = 25 c) o f f s e t l e v e l v s . s u p p l y v o l t a g e ( s t a n d a r d c h a r a c t e r i s t i c s ) v d d s u p p l y v o l t a g e [ v ] v o s o f f s e t l e v e l [ v ] 9 . 0 8 . 5 0 4 2 6 8 1 0 9 . 5 w a v e l e n g t h [ n m ] r e l a t i v e s e n s i t i v i t y 5 5 0 6 0 0 6 5 0 4 0 0 0 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0 4 5 0 5 0 0 7 0 0 s p e c t r a l s e n s i t i v i t y c h a r a c t e r i s t i c s ( s t a n d a r d c h a r a c t e r i s t i c s ) d a r k o u t p u t v o l t a g e r a t e v s . a m b i e n t t e m p e r a t u r e ( s t a n d a r d c h a r a c t e r i s t i c s ) t a a m b i e n t t e m p e r a t u r e [ c ] d a r k o u t p u t v o l t a g e r a t e 3 0 4 0 5 0 1 0 0 . 1 1 1 0 1 0 0 1 0 0 2 0 6 0 o u t p u t v o l t a g e r a t e v s . i n t e g r a t i o n t i m e ( s t a n d a r d c h a r a c t e r i s t i c s ) t i n t i n t e g r a t i o n t i m e [ m s ] o u t p u t v o l t a g e r a t e 5 1 0 . 1 1 1 0 1 0 o f f s e t l e v e l v s . a m b i e n t t e m p e r a t u r e ( s t a n d a r d c h a r a c t e r i s t i c s ) t a a m b i e n t t e m p e r a t u r e [ c ] v o s o f f s e t l e v e l [ v ] 3 0 4 0 5 0 1 0 0 4 2 6 8 1 0 1 0 0 2 0 6 0
? 10 ILX115LA notes of handling 1) static charge prevention ccd image sensors are easily damaged by static discharge. before handling be sure to take the following protective measures. a) either handle bare handed or use non chargeable gloves, clothes or material. also use conductive shoes. b) when handling directly use an earth band. c) install a conductive mat on the floor or working table to prevent the generation of static electricity. d) ionized air is recommended for discharge when handling ccd image sensor. e) for the shipment of mounted substrates, use boxes treated for prevention of static charges. 2) notes on handling ccd cer-dip packages the following points should be observed when handling and installing cer-dip packages. a) remain within the following limits when applying a static load to the ceramic portion of the package: (1) compressive strength: 39n/surface (do not apply load more than 0.7mm inside the outer perimeter of the glass portion.) (2) shearing strength: 29n/surface (3) tensile strength: 29n/surface (4) torsional strength: 0.9nm b) in addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive. c) be aware that any of the following can cause the glass to crack: because the upper and lower ceramic layers are shielded by low-melting glass, (1) applying repetitive bending stress to the external leads. (2) applying heat to the external leads for an extended period of time with a soldering iron. (3) rapid cooling or heating. (4) applying a load or impact to a limited portion of the low-melting glass with a small-tipped tool such as tweezers. (5) prying the upper or lower ceramic layers away at a support point of the low-melting glass. note that the preceding notes should also be observed when removing a component from a board after it has already been soldered. 3) soldering a) make sure the package temperature does not exceed 80 c. b) solder dipping in a mounting furnace causes damage to the glass and other defects. use a grounded 30w soldering iron and solder each pin in less then 2 seconds. for repairs and remount, cool sufficiently. c) to dismount an imaging device, do not use a solder suction equipment. when using an electric desoldering tool, ground the controller. for the control system, use a zero cross type. u p p e r c e r a m i c l a y e r 3 9 n l o w e r c e r a m i c l a y e r l o w - m e l t i n g g l a s s ( 1 ) 2 9 n ( 3 ) 0 . 9 n m ( 4 ) 2 9 n ( 2 )                                           
? 11 ILX115LA 4) dust and dirt protection a) operate in clean environments. b) do not either touch glass plates by hand or have any object come in contact with glass surfaces. should dirt stick to a glass surface, blow it off with an air blower. (for dirt stuck through static electricity ionized air is recommended.) c) clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. be careful not to scratch the glass. d) keep in a case to protect from dust and dirt. to prevent dew condensation, preheat or precool when moving to a room with great temperature differences. 5) exposure to high temperatures or humidity will affect the characteristics. accordingly avoid storage or usage in such conditions. 6) ccd image sensors are precise optical equipment that should not be subject to mechanical shocks.
? 12 ILX115LA package outline unit: mm p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s d r a w i n g n u m b e r ~ ~ 8 4 . 0 8 . 4 8 9 . 0 1 . 0 1 0 . 0 0 . 8 1 0 . 1 6 4 . 6 0 0 . 5 3 . 9 0 4 4 . 4 5 0 4 . 0 0 . 5 1 . 7 7 8 0 . 4 6 0 . 2 5 5 . 0 0 . 5 6 . 6 8 2 . 0 2 5 . 0 5 . 0 2 9 . 0 5 . 0 h v 1 1 . 1 0 . 8 4 4 p i n s d i p ( 4 0 0 m i l ) 7 0 . 0 ( 1 4 m x 5 0 0 0 p i x e l s ) n o . 1 p i x e l ( b l u e ) ~ ( a t s t a n d o f f ) 0 ? t o 9 ? c e r - d i p t i n p l a t i n g 4 2 a l l o y 1 1 . 5 g l s - b 1 5 - 0 1 ( e ) a ' a ' a 1 . t h e p o i n t a o f t h e p a c k a g e i s t h e h o r i z o n t a l r e f e r e n c e . t h e t w o p o i n t s a ' o f t h e p a c k a g e a r e t h e v e r t i c a l r e f e r e n c e . 2 . t h e h e i g h t f r o m t h e b o t t o m t o t h e s e n s o r s u r f a c e i s 2 . 4 0 . 3 m . 3 . t h e t h i c k n e s s o f t h e c o v e r g l a s s i s 0 . 7 m m , a n d t h e r e f r a c t i v e i n d e x i s 1 . 5 . 4 . t h e n o t c h o f t h e p a c k a g e m u s t n o t b e u s e d f o r r e f e r e n c e o f f i x i n g .


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